Senior Digital ASIC / FPGA Design Engineer

/Senior Digital ASIC / FPGA Design Engineer

Website MoTek Technologies

Digital ASIC / FPGA Design Engineer

Responsibilities:

Implementation of entire design flow from RTL to GDS
Perform verification planning and firmware based verification
Validation and Scan test vectors and BIST implementation
Logic synthesis, simulation setup and debugging
Behavior modelling using Verilog and/or Verilog-AMS

Requirements:

MSEE + 8 years of industry experience or PhD + 5 years ASIC/FPGA Design
ASIC & FPGA background with hands-on, high-speed digital design
MUST HAVE Verilog and System Verilog experience
Mixed mode simulation, STA (Static Timing Analysis) and logic synthesis
Synopsys and/or Quartus experience is required
Signal processing experience is also a +
Must have good team work attitude and be able to work under pressure.

Nice to have:

MATLAB

C/C++ Programming

Robotics experience

PLEASE SEND YOUR RESUME TO: brett.leonardo@motektech.com

KeywordPhrases Include: Hardware Design, ASIC, Application Specific Integrated Circuits, FPGA, Field Programmable Gate Array, VHDL, Verilog, Digital Signal Processing, DSP, Payloads, Altera, Robotics, Autonomous Vehicles, Sensors, deep convolutional neural networks, training and inference, object detection, point cloud libraries, Robot Operating system.

Upload your CV/resume or any other relevant file. Max. file size: 128 MB.

2017-10-05T23:41:24+00:00By |